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TC62D722CFG/cfng 2011-09-24 1 toshiba cdmos integrated circuit silicone monolithic TC62D722CFG, tc62d722cfng 16-output constant current led driver with the out put gain control function and the pwm grayscale function feature the tc62d722 series are led dr ivers which have the sink-type constant current output. this ic is most suitable for lighting the led module and the display. the output gain control function of 8-bit and the pwm grayscale function of 16, 14, 12, and 10-bit are built into this ic. output current value of 16 channels is set by one external resistance. in addition, the thermal shut down function, the output open detection function, and the output s hort detection function are built in. characteristics ? supply voltage : v dd ? 3.0 to 5.5 v ? 16-output built-in ? output current setup range : i out ? 1.5 to 90 ma ? constant current output accuracy (@ r ext = 1.2 k ? , v out = 1.0 v, v dd = 3.3 v, 5.0 v) : s rank between outputs ? 1.5 % (max), between devices: ? 1.5 % (max) : n rank between outputs ? 2.5 % (max), between devices: ? 2.5 % (max) ? output voltage : v out ? 17 v (max) ? i/o interface : cmos interf aces (input of a schmitt trigger) ? data transfer frequency : f sck ? 30 mhz (max) ? pwm frequency : f pwm ? 33 mhz (max) ? operation temperature range : t opr ? ?40 to 85 ?c ? 8-bit (256 steps) output gai n control function built-in. ? pwm gray scale function built-in. (pwm resolution is selectable) 16-bit (65536 steps), 14-bit (16384 steps) 12-bit (4096 steps), 10-bit (1024 steps) ? thermal shutdown function (tsd) built-in. ? output error detecti on function built-in. this function has the autom atic operation and the command input manual operation. output open detection function (ood) and output short detecti on function (osd) built-in. ? power-on-reset function built-in. (when the power supply is turned on, internal data is reset) ? stand-by function built-in. (i dd =1 a at standby mode) ? output delay function built-in. (o utput switching noise is reduced) ? package cfg type : ssop24-p-300-1.00b cfng type : htssop24-p-300-0.65 please ask toshiba sales dept or ag ent for details for products? name. TC62D722CFG ssop24-p-300-1.00b tc62d722cfng htssop24-p-300-0.65 weight ssop24-p-300-1.00b : 0.32 g (typ.) htssop24-p-300-0.65 : 0.10 g (typ.)
TC62D722CFG/cfng 2011-09-24 2 block diagram out0 out1 out15 sin sck vdd gnd rext sout constant current output circuit pwm counter 8-bit dac reference voltage pwmclk trans error detection result data register 16-bit ? 2 state setting register 16 16-bit shift register 6 ?? 16-bit pwm data for 0out data transfer control circuit 16 16 16 16 8 ?????????? ????????????? 16 15-bit 0-bit 16 pod circuit comparator 16-bit pwm data for 0out 16-bit pwm data for 1out 16-bit pwm data for 15out 16 ????????????? output on / off setting data register 15-bit 0-bit tsd circuit 6 ?? 16-bit pwm data for 1out 6 ?? 16-bit pwm data for 15out pwm data register por circuit 16 f/f sout selection circuit output open/short detection circuit comparator comparator 16 s0 (s1) s1 s2 s3 (s1) s4 s5 (s6) 16-bit pwm data for 0out 16-bit pwm data for 1out 16-bit pwm data for 15out ????????????? 16 16 16 16 16 16 16 16 16 16 16 16 register 2 for synchronous register 3 for output register 1 output delay circuit command control circuit
TC62D722CFG/cfng 2011-09-24 3 pin assignment (top view) pin description pin no pin name i/o function 1 gnd ? the ground pin. 2 sin i the serial data input pin. 3 sck i the serial data transfer clock input pin. 4 trans i the data transfer command input pin. 5 0 out o the sink type constant current output pin. 6 1 out o the sink type constant current output pin. 7 2 out o the sink type constant current output pin. 8 3 out o the sink type constant current output pin. 9 4 out o the sink type constant current output pin. 10 5 out o the sink type constant current output pin. 11 6 out o the sink type constant current output pin. 12 7 out o the sink type constant current output pin. 13 8 out o the sink type constant current output pin. 14 9 out o the sink type constant current output pin. 15 10 out o the sink type constant current output pin. 16 11 out o the sink type constant current output pin. 17 12 out o the sink type constant current output pin. 18 13 out o the sink type constant current output pin. 19 14 out o the sink type constant current output pin. 20 15 out o the sink type constant current output pin. 21 pwmclk i the reference clock input pin for pwm grayscale control. one cycle of the input clock becomes a minimum pulse width of the pwm output. 22 sout o the serial data output pin. 23 rext ? the constant current value setting resistor connection pin. 24 vdd ? the power supply input pin. gnd sin sck 0out 1out 2out 3out 4out 5out 6out 7out vdd rext sout pwmclk 15out 14out 13out 12out 11out 10out 9out trans 8out
TC62D722CFG/cfng 2011-09-24 4 equivalent circuit of input and output 1. sck, sin 2. pwmclk, trans 3. sout 4. out0 to out15 0 out to 15out gnd vdd sout gnd (sck) (sin) gnd vdd gnd (pwmclk) (trans) vdd
TC62D722CFG/cfng 2011-09-24 5 1. explanation of the function ( basic data input pattern) data input is done with the sin pin and the sck pin.command selection is done with the sck pin and the trans pin. about the operation of each command command number of sck pulses at trans=?h? note3,4 operation s0 0,1 the pwm data in the 16-bit shift register is transmitted to the pwm data register 1. s1 2,3 1. the pwm data in the pwm data register 1 is transmitted to the pwm data register 2 or 3. note1 2. the automatic output open/short detection result data is transmitted to the 16-bit shift register. note2 3. pwm output start. s2 7,8 input of the output on/off data. (when this function is not used, this input is unnecessary.) s3 9,10 the manual output open/short detecti on functions are executed. note2 the manual output open/short detection result data is transmitted to the 16-bit shift register. note2 s4 11,12 reset of the internal pwm counter. s5 13,14 input of the state setting data (1). s6 15,16 input of the state setting data (2). note1: transmitted register changes by a pwm counter synchronization setting. note2: this operation is performed when the output open/short detection function is ?active? setting. note3: other sck numbers are disregarded. note4: if sck is "l" when changing trans into "h", please make scl "l" when changing trans into "l" if sck is "h" when changing trans into "h", please make scl "h" when changing trans into "l" ? s0 command (the pwm data is transmitted to the pwm data register 1.) ? s1 command (the pwm data is transmitted to the pwm data register 2 or 3.) ? s2 command (input of the output on/off data.) ? s3 command (the output open/short detection functions manual operation is executed.) ? s4 command (reset of the internal pwm counter.) ? s5 command (input of the state setting data (1).) ? s6 command (input of the state setting data (2).)
TC62D722CFG/cfng 2011-09-24 6 2. about the operation of each command 2-1-1) s0 command (the pwm data is tran smitted to the pwm data register 1.) operation) in the number of sck pulses at trans= "h" is 0 or 1, the follo wing operation is executed. the pwm data in the 16-bit shift register is transmitted to the pwm data register 1. it is necessary to repeat this command 16 times to input the pwm data of 0 out to 15 out . the order of the pwm data transfer is the following. 15out 14out 13out 12out 11out 10out 9out 8out 7out 6out 5out 4out 3out 2out 1out 0out basic input pattern of s0 command) sck trans sin sout d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 repetition pattern the pwm data of out15 ~ out0 is input by repeating this pattern 16 times. d14 d13 d12 d15 command execution previous data 1 the period of trans="h" does not receive the data input from sin. sout is operation at the time of s6 command n0=0 conditions.
TC62D722CFG/cfng 2011-09-24 7 2-1-2) input form of the pwm data pwm resolution is set by the s5 co mmand. default setting is ?16-bit?. 1. 16-bit pwm setting msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 pwm setting (reference) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0/65535(default) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1/65535 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 2/65535 ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 65533/65535 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 65534/65535 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 65535/65535 d15 to d0 is serial-data-inputted at msb first. 2. 14-bit pwm setting msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 pwm setting (reference) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0/16383(default) 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1/16383 0 0 0 0 0 0 0 0 0 0 0 0 1 0 2/16383 ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? 1 1 1 1 1 1 1 1 1 1 1 1 0 1 16381/16383 1 1 1 1 1 1 1 1 1 1 1 1 1 0 16382/16383 don?t care 1 1 1 1 1 1 1 1 1 1 1 1 1 1 16383/16383 d15 to d0 is serial-data-inputted at msb first. 3. 12-bit pwm setting msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 pwm setting (reference) 0 0 0 0 0 0 0 0 0 0 0 0 0/4095(default) 0 0 0 0 0 0 0 0 0 0 0 1 1/4095 0 0 0 0 0 0 0 0 0 0 1 0 2/4095 ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? 1 1 1 1 1 1 1 1 1 1 0 1 4093/4095 1 1 1 1 1 1 1 1 1 1 1 0 4094/4095 don?t care 1 1 1 1 1 1 1 1 1 1 1 1 4095/4095 d15 to d0 is serial-data-inputted at msb first. 4. 10-bit pwm setting msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 pwm setting (reference) 0 0 0 0 0 0 0 0 0 0 0/1023(default) 0 0 0 0 0 0 0 0 0 1 1/1023 0 0 0 0 0 0 0 0 1 0 2/1023 ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? 1 1 1 1 1 1 1 1 0 1 1021/1023 1 1 1 1 1 1 1 1 1 0 1022/1023 don?t care 1 1 1 1 1 1 1 1 1 1 1023/1023 d15 to d0 is serial-data-inputted at msb first.
TC62D722CFG/cfng 2011-09-24 8 2-2-1) s1 command (the pwm data is transm itted to the pwm data register 2 or 3.) operation) in the number of sck pulses at trans= "h" is 2 or3, the follo wing operation is executed. 1. the pwm data in the pwm data register 1 is transmitted to the pwm data register 2 or 3. 2. the automatic output open/short detection result data is transmitted to the 16-bit shift register. note1 when internal pwm count is 1 to 21, the out put open/short detection automatic operation is done. during detection, the det ection current flows to the 0out ~ 15out terminal. the detection current is about 4 ? a. 3. the pwm output start. in the input of this command, the pwm output is turned on once. when restarting by same pwm data, please input this command again. about the output operation when this command is input while pwm output. 1. when the pwm counter is the synchronous mode. note2 after the present pwm output has ended, pw m output is started by new pwm data. 2. when the pwm counter is the asynchronous mode. note2 the present pwm output is c anceled and a pwm output is imm ediately started by new pwm data. basic input pattern of s1 command) the first sck (signal x) after s1 command is used for transmission of the output open/short detection result data. the input fr om sin is not received. note1 when internal pwm count is 1 to 21, the output open/short detection autom atic operation is done. the detection current flows to the 0out ~ 15out terminal. the detection current is about 4 ? a. note1 note1: this operation is perform ed when the output open/short detecti on function is ?active? setting. the output open/short det ection functions are set by s6 command. default setting is ?not active?. note2: pwm output synchronization pwm re solution is set by the s6 command. default setting is ?synchronous mode?.
TC62D722CFG/cfng 2011-09-24 9 2-2-2) output form of the output open/short detection result data it is transmitted to 16 bit-shift register in the following form. msb lsb e15 e14 e13 e12 e11 e10 e9 e8 e7 e6 e5 e4 e3 e2 e1 e0 15out 14out 13out 12out 11out 10out 9out 8out 7out 6out 5out 4out 3out 2out 1out 0out e15 to e0 is serial-data-outputted at msb first. error code (when output open detect ion function is effective) the state of output error code condition of output v ood ? v out 0 open v ood < v out 1 normal error code (when output short det ection function is effective) the state of output error code condition of output v osd1/2 ? v out 0 short-circuit v osd1/2 > v out 1 normal error code (when output open/short de tection function is effective) the state of output error code condition of output v ood ? v out or v osd1/2 ? v out 0 open or short-circuit v ood < v out or v osd1/2 > v out 1 normal when both output error detection function is effe ctive, open and short-circ uit are undistinguishable. when internal pwm count is 1 to 21, the output open/short detection autom atic operation is done. when the output is off during the output open/short detection execution, the error code becomes "1". setting of pwm output mode setting of pwm bits number the pwm step that becomes error code "1" without relations in the state of the output pin. 16 bit pwm setting 14 bit pwm setting 12 bit pwm setting normal pwm output mode 10 bit pwm setting 0 to 20 pwm stepsetting 16 bit pwm setting 14 bit pwm setting 12 bit pwm setting 0 to 2560 pwm stepsetting division pwm output mode 10 bit pwm setting 0 to 960 pwm stepsetting the above table is unrelated at t he time of the output open/short detection manual operation by s3 command.
TC62D722CFG/cfng 2011-09-24 10 2-3-1) s2 command (input of the output on/off data.) when this function is not used, this input is unnecessary. operation) in the number of sck pulses at trans= "h" is 7 or 8, the follo wing operation is executed. input of the output on/off data. even if pwm data is not changed to 0 settings , on/off of the output can be controlled. about the output operation when this command is input while pwm output. 1. when the pwm counter is the synchronous mode. note1 the setting of this command is reflected in the next pwm output. 2. when the pwm counter is the asynchronous mode. note1 the setting of this command is reflected immediately. basic input pattern of s2 command) note1: pwm output synchronization pwm re solution is set by the s6 command. default setting is ?synchronous mode?. 2-3-2) input form of the output on/off data msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 15out 14out 13out 12out 11out 10out 9out 8out 7out 6out 5out 4out 3out 2out 1out 0out d15 to d0 is serial-data-inputted at msb first. the output on/off data setting input data setting 1 output operates according to pwm data setting. (default) 0 output turn off
TC62D722CFG/cfng 2011-09-24 11 2-4) s3 command (the manual output open/s hort detection functions are executed.) operation) in the number of sck pulses at trans="h " is 9 or 10, the followi ng operation is executed. the manual output open/shor t detection functions are executed. note1 the output is compulsorily turned on during t on(s3) with about 60 a. and detection is done. the manual output open/short detecti on result data is transmitted to the 16-bit shift register. t on(s3) is about 800ns. for the period of t on(s3) , please set sck and trans to ?l?. when inputting this command during pwm outpu t, the manual output open/short detection functions are executed after t he pwm output. in this case, t on(s3) occurs after a pwm output. basic input pattern of s3 command) the first sck (signal x) after this command is used for transmission of the output open/short detection result data. the input fr om sin is not received. note1 note1: this operation is perform ed when the output open/short detecti on function is ?active? setting. the output open/short det ection functions are set by s6 command. default setting is ?not active?. 2-5) s4 command (reset of the internal pwm counter.) operation) in the number of sck pulses at trans="h " is 11 or 12, the follo wing operation is executed. the internal pwm counter is reset. when the internal pwm counter is reset, the output is turned off. it is necessary to input s1 command to turn on the output again. basic input pattern of s4 command) sck trans pwmclk sout command execution 2 11 12 off on n0000
TC62D722CFG/cfng 2011-09-24 12 2-6-1) s5 command (input of the state setting data (1).) operation) in the number of sck pulses at trans= "h" is 13 or 14, the follo wing operation is executed. the state setting data (1) in the 16-bit shift regi ster is transmitted to the state setting register. basic input pattern of s5 command) 2-6-2) input form of th e state setting data (1) msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 a7 a6 a5 a4 a3 a2 a1 a0 - - - - b1 b0 h0 l0 d15 to d0 is serial-data-inputted at msb first. please input "l" data to d7 to d4. the state setting data (1) setting input data setting bit outline of command 0 1 (default) a7 setting of output gain control range high setting mode 47.5% to 202.7% low setting mode 8.46% to 43.96% 47.5% to 202.7% a6 to a0 setting of output gain control data please refer to 13 ? 14 page. 100.0% b1 to b0 setting of pwm resolution please refer to 15 page. 16-bit h0 setting of initialization function not active active not active l0 setting of standby mode (1) function not active active not active
TC62D722CFG/cfng 2011-09-24 13 2-6-3) details of each setting a setting (setting of output gain control data reference value) 1. in the case of the high setti ng mode (47.5% to 202.7%) a[6] a[5] a[4] a[3] a[2] a[1] a[0] current gain(%) a[6] a[5] a[4] a[3] a[2] a[1] a[0] current gain(%) 1 1 1 1 1 1 1 202.7 0 1 1 1 1 1 1 124.5 1 1 1 1 1 1 0 201.5 0 1 1 1 1 1 0 123.3 1 1 1 1 1 0 1 200.3 0 1 1 1 1 0 1 122.0 1 1 1 1 1 0 0 199.1 0 1 1 1 1 0 0 120.8 1 1 1 1 0 1 1 197.8 0 1 1 1 0 1 1 119.6 1 1 1 1 0 1 0 196.6 0 1 1 1 0 1 0 118.4 1 1 1 1 0 0 1 195.4 0 1 1 1 0 0 1 117.2 1 1 1 1 0 0 0 194.2 0 1 1 1 0 0 0 115.9 1 1 1 0 1 1 1 193.0 0 1 1 0 1 1 1 114.7 1 1 1 0 1 1 0 191.7 0 1 1 0 1 1 0 113.5 1 1 1 0 1 0 1 190.5 0 1 1 0 1 0 1 112.3 1 1 1 0 1 0 0 189.3 0 1 1 0 1 0 0 111.0 1 1 1 0 0 1 1 188.1 0 1 1 0 0 1 1 109.8 1 1 1 0 0 1 0 186.8 0 1 1 0 0 1 0 108.6 1 1 1 0 0 0 1 185.6 0 1 1 0 0 0 1 107.4 1 1 1 0 0 0 0 184.4 0 1 1 0 0 0 0 106.2 1 1 0 1 1 1 1 183.2 0 1 0 1 1 1 1 104.9 1 1 0 1 1 1 0 181.9 0 1 0 1 1 1 0 103.7 1 1 0 1 1 0 1 180.7 0 1 0 1 1 0 1 102.5 1 1 0 1 1 0 0 179.5 0 1 0 1 1 0 0 101.3 1 1 0 1 0 1 1 178.3 0 1 0 1 0 1 1 100.0 (default) 1 1 0 1 0 1 0 177.1 0 1 0 1 0 1 0 98.8 1 1 0 1 0 0 1 175.8 0 1 0 1 0 0 1 97.6 1 1 0 1 0 0 0 174.6 0 1 0 1 0 0 0 96.4 1 1 0 0 1 1 1 173.4 0 1 0 0 1 1 1 95.2 1 1 0 0 1 1 0 172.2 0 1 0 0 1 1 0 93.9 1 1 0 0 1 0 1 170.9 0 1 0 0 1 0 1 92.7 1 1 0 0 1 0 0 169.7 0 1 0 0 1 0 0 91.5 1 1 0 0 0 1 1 168.5 0 1 0 0 0 1 1 90.3 1 1 0 0 0 1 0 167.3 0 1 0 0 0 1 0 89.0 1 1 0 0 0 0 1 166.1 0 1 0 0 0 0 1 87.8 1 1 0 0 0 0 0 164.8 0 1 0 0 0 0 0 86.6 1 0 1 1 1 1 1 163.6 0 0 1 1 1 1 1 85.4 1 0 1 1 1 1 0 162.4 0 0 1 1 1 1 0 84.2 1 0 1 1 1 0 1 161.2 0 0 1 1 1 0 1 82.9 1 0 1 1 1 0 0 159.9 0 0 1 1 1 0 0 81.7 1 0 1 1 0 1 1 158.7 0 0 1 1 0 1 1 80.5 1 0 1 1 0 1 0 157.5 0 0 1 1 0 1 0 79.3 1 0 1 1 0 0 1 156.3 0 0 1 1 0 0 1 78.0 1 0 1 1 0 0 0 155.1 0 0 1 1 0 0 0 76.8 1 0 1 0 1 1 1 153.8 0 0 1 0 1 1 1 75.6 1 0 1 0 1 1 0 152.6 0 0 1 0 1 1 0 74.4 1 0 1 0 1 0 1 151.4 0 0 1 0 1 0 1 73.2 1 0 1 0 1 0 0 150.2 0 0 1 0 1 0 0 71.9 1 0 1 0 0 1 1 148.9 0 0 1 0 0 1 1 70.7 1 0 1 0 0 1 0 147.7 0 0 1 0 0 1 0 69.5 1 0 1 0 0 0 1 146.5 0 0 1 0 0 0 1 68.3 1 0 1 0 0 0 0 145.3 0 0 1 0 0 0 0 67.0 1 0 0 1 1 1 1 144.1 0 0 0 1 1 1 1 65.8 1 0 0 1 1 1 0 142.8 0 0 0 1 1 1 0 64.6 1 0 0 1 1 0 1 141.6 0 0 0 1 1 0 1 63.4 1 0 0 1 1 0 0 140.4 0 0 0 1 1 0 0 62.1 1 0 0 1 0 1 1 139.2 0 0 0 1 0 1 1 60.9 1 0 0 1 0 1 0 137.9 0 0 0 1 0 1 0 59.7 1 0 0 1 0 0 1 136.7 0 0 0 1 0 0 1 58.5 1 0 0 1 0 0 0 135.5 0 0 0 1 0 0 0 57.3 1 0 0 0 1 1 1 134.3 0 0 0 0 1 1 1 56.0 1 0 0 0 1 1 0 133.1 0 0 0 0 1 1 0 54.8 1 0 0 0 1 0 1 131.8 0 0 0 0 1 0 1 53.6 1 0 0 0 1 0 0 130.6 0 0 0 0 1 0 0 52.4 1 0 0 0 0 1 1 129.4 0 0 0 0 0 1 1 51.1 1 0 0 0 0 1 0 128.2 0 0 0 0 0 1 0 49.9 1 0 0 0 0 0 1 126.9 0 0 0 0 0 0 1 48.7 1 0 0 0 0 0 0 125.7 0 0 0 0 0 0 0 47.5
TC62D722CFG/cfng 2011-09-24 14 2. in the case of the low set ting mode (8.46% to 43.96%) a[6] a[5] a[4] a[3] a[2] a[1] a[0] current gain(%) a[6] a[5] a[4] a[3] a[2] a[1] a[0] current gain(%) 1 1 1 1 1 1 1 43.96 0 1 1 1 1 1 1 26.07 1 1 1 1 1 1 0 43.68 0 1 1 1 1 1 0 25.79 1 1 1 1 1 0 1 43.40 0 1 1 1 1 0 1 25.51 1 1 1 1 1 0 0 43.12 0 1 1 1 1 0 0 25.23 1 1 1 1 0 1 1 42.84 0 1 1 1 0 1 1 24.95 1 1 1 1 0 1 0 42.56 0 1 1 1 0 1 0 24.67 1 1 1 1 0 0 1 42.28 0 1 1 1 0 0 1 24.39 1 1 1 1 0 0 0 42.00 0 1 1 1 0 0 0 24.11 1 1 1 0 1 1 1 41.72 0 1 1 0 1 1 1 23.83 1 1 1 0 1 1 0 41.44 0 1 1 0 1 1 0 23.55 1 1 1 0 1 0 1 41.16 0 1 1 0 1 0 1 23.27 1 1 1 0 1 0 0 40.89 0 1 1 0 1 0 0 23.00 1 1 1 0 0 1 1 40.61 0 1 1 0 0 1 1 22.72 1 1 1 0 0 1 0 40.33 0 1 1 0 0 1 0 22.44 1 1 1 0 0 0 1 40.05 0 1 1 0 0 0 1 22.16 1 1 1 0 0 0 0 39.77 0 1 1 0 0 0 0 21.88 1 1 0 1 1 1 1 39.49 0 1 0 1 1 1 1 21.60 1 1 0 1 1 1 0 39.21 0 1 0 1 1 1 0 21.32 1 1 0 1 1 0 1 38.93 0 1 0 1 1 0 1 21.04 1 1 0 1 1 0 0 38.65 0 1 0 1 1 0 0 20.76 1 1 0 1 0 1 1 38.37 0 1 0 1 0 1 1 20.48 1 1 0 1 0 1 0 38.09 0 1 0 1 0 1 0 20.20 1 1 0 1 0 0 1 37.81 0 1 0 1 0 0 1 19.92 1 1 0 1 0 0 0 37.53 0 1 0 1 0 0 0 19.64 1 1 0 0 1 1 1 37.25 0 1 0 0 1 1 1 19.36 1 1 0 0 1 1 0 36.97 0 1 0 0 1 1 0 19.08 1 1 0 0 1 0 1 36.69 0 1 0 0 1 0 1 18.80 1 1 0 0 1 0 0 36.41 0 1 0 0 1 0 0 18.52 1 1 0 0 0 1 1 36.13 0 1 0 0 0 1 1 18.24 1 1 0 0 0 1 0 35.85 0 1 0 0 0 1 0 17.96 1 1 0 0 0 0 1 35.57 0 1 0 0 0 0 1 17.68 1 1 0 0 0 0 0 35.29 0 1 0 0 0 0 0 17.40 1 0 1 1 1 1 1 35.02 0 0 1 1 1 1 1 17.13 1 0 1 1 1 1 0 34.74 0 0 1 1 1 1 0 16.85 1 0 1 1 1 0 1 34.46 0 0 1 1 1 0 1 16.57 1 0 1 1 1 0 0 34.18 0 0 1 1 1 0 0 16.29 1 0 1 1 0 1 1 33.90 0 0 1 1 0 1 1 16.01 1 0 1 1 0 1 0 33.62 0 0 1 1 0 1 0 15.73 1 0 1 1 0 0 1 33.34 0 0 1 1 0 0 1 15.45 1 0 1 1 0 0 0 33.06 0 0 1 1 0 0 0 15.17 1 0 1 0 1 1 1 32.78 0 0 1 0 1 1 1 14.89 1 0 1 0 1 1 0 32.50 0 0 1 0 1 1 0 14.61 1 0 1 0 1 0 1 32.22 0 0 1 0 1 0 1 14.33 1 0 1 0 1 0 0 31.94 0 0 1 0 1 0 0 14.05 1 0 1 0 0 1 1 31.66 0 0 1 0 0 1 1 13.77 1 0 1 0 0 1 0 31.38 0 0 1 0 0 1 0 13.49 1 0 1 0 0 0 1 31.10 0 0 1 0 0 0 1 13.21 1 0 1 0 0 0 0 30.82 0 0 1 0 0 0 0 12.93 1 0 0 1 1 1 1 30.54 0 0 0 1 1 1 1 12.65 1 0 0 1 1 1 0 30.26 0 0 0 1 1 1 0 12.37 1 0 0 1 1 0 1 29.98 0 0 0 1 1 0 1 12.09 1 0 0 1 1 0 0 29.70 0 0 0 1 1 0 0 11.81 1 0 0 1 0 1 1 29.42 0 0 0 1 0 1 1 11.53 1 0 0 1 0 1 0 29.15 0 0 0 1 0 1 0 11.26 1 0 0 1 0 0 1 28.87 0 0 0 1 0 0 1 10.98 1 0 0 1 0 0 0 28.59 0 0 0 1 0 0 0 10.70 1 0 0 0 1 1 1 28.31 0 0 0 0 1 1 1 10.42 1 0 0 0 1 1 0 28.03 0 0 0 0 1 1 0 10.14 1 0 0 0 1 0 1 27.75 0 0 0 0 1 0 1 9.86 1 0 0 0 1 0 0 27.47 0 0 0 0 1 0 0 9.58 1 0 0 0 0 1 1 27.19 0 0 0 0 0 1 1 9.30 1 0 0 0 0 1 0 26.91 0 0 0 0 0 1 0 9.02 1 0 0 0 0 0 1 26.63 0 0 0 0 0 0 1 8.74 1 0 0 0 0 0 0 26.35 0 0 0 0 0 0 0 8.46
TC62D722CFG/cfng 2011-09-24 15 b setting (setting of pwm resolution) b[1] b[0] setting 0 0 16-bit (65536 steps) setting. (default) 0 1 14-bit (16384 steps) setting. 1 0 12-bit (4096 steps) setting. 1 1 10-bit (1024 steps) setting. h setting (setting of initialization function h[0] setting 0 the initialization function becomes not active (default) it's normal operation mode. 1 the initialization func tion becomes active. all data in ic is initialized. after data initialization, it becomes normal operation mode. l setting (setting of sta ndby mode (1) function) l[0] setting 0 the standby mode (1) function becomes not active. (default) it's normal operation mode. 1 the standby mode (1) function becomes active. the circuits other than the logic circuit ar e turned off. and power supply current is reduced. (all the data of the ic are stor ed. data input is possible.) when s0 command is inputted at the standby mode (1), ic returns to normal operation mode. return time to the normal operation mode is about 30 s.
TC62D722CFG/cfng 2011-09-24 16 2-7-1) s6 command (input of the state setting data (2).) operation) in the number of sck pulses at trans= "h" is 15 or 16, the follo wing operation is executed. the state setting data (2) in the 16-bit shift regi ster is transmitted to the state setting register. basic input pattern of s6 command) 2-7-2) input form of th e state setting data (2) msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 c0 d0 e0 f0 g0 i0 j0 k0 m0 n0 - - - - - - d15 to d0 is serial-data-inputted at msb first. please input "l" data to d5 to d0. the state setting data (2) setting input data setting bit outline of command 0 1 (default) c0 setting of thermal shutdown function (tsd) active not active active d0 setting of pwmclk open detection function (pod) active not active active e0 setting of output open detection function (ood) not active active not active f0 setting of output short detecti on function (osd) not active active not active g0 setting of pwm output synchronization synchronous asynchronous synchronous i0 setting of pwm output system normal output division output normal output j0 setting of standby mode (2) function this function becomes active only at the time of the 16-bit pwm setting. not active active not active k0 setting of output short detection voltage v osd1 v osd2 v osd1 m0 setting of output delay function active not active active n0 setting of sck trigger of sout up edge trigger mode down edge trigger mode up edge trigger mode
TC62D722CFG/cfng 2011-09-24 17 2-7-3) details of each setting c setting (setting of therma l shutdown function (tsd)) c[0] setting 0 thermal shutdown function becomes active. (default) 1 thermal shutdown functi on becomes not active. d setting (setting of pwmclk ope n detection function (pod)) d[0] setting 0 pwmclk open detection function becomes active. (default) when it was the state that a pwmclk signal isn't input by breaking of wiring, it's the function which prevents pwm output keeping stopping by on state. when pwmclk is not inputted for about 1 second after it is inputted even once, all output is turned off compulsorily. output compulsion off is released by th e initialization function of s5 command. in addition, the output compulsion off is removed by inputting pwmclk again. 1 pwmclk open detection func tion becomes not active. e setting (setting of output open detection function (ood)) e[0] setting 0 output open detection function becomes not active. (default) 1 output open detection f unction becomes active. f setting (setting of output shor t detection function (osd)) f[0] setting 0 output short detection function becomes not active. (default) 1 output short detection function becomes active. g setting (setting of pwm output synchronization) g[0] setting 0 pwm output synchronous mode. (default) 1 pwm output asynchronous mode. i setting (setting of pwm output system) i[0] setting 0 normal pwm output mode. (default) 1 division pwm output mode.
TC62D722CFG/cfng 2011-09-24 18 j setting (setting of standby mode (2)) j[0] setting 0 the standby mode (2) function becomes not active. (default) it's normal operation mode. 1 the standby mode (2) function becomes active. a state changes according to the data in a pwm data register. condition 1: all data in the pwm data regist er1 and the pwm data register3 are "l". it becomes standby mode (2). the circuits other than the logic ci rcuit are turned off. and power supply current is reduced. (all the data of the ic are stor ed. data input is possible.) condition 2: excluding condition 1. it becomes pre standby mode. it is the same operation as normal operation mode. return time from standby mode (2) to pre standby mode is about 30 s. this function becomes active only at the time of the 16-bit pwm setting. k setting (setting of output short detection voltage) k[0] setting 0 v osd1 setting. (default) 1 v osd2 setting. m setting (setting of output delay function) m[0] setting 0 output delay function becomes active. (default) 1 output delay functi on becomes not active. n setting (setting of sck trigger of sout) n[0] setting 0 it becomes up edge trigger mode. (default) data output trigger from sout, becomes up edge of sck 1 it becomes down edge trigger mode. data output trigger from sout, becomes down edge of sck
TC62D722CFG/cfng 2011-09-24 19 3. input of pwm setting data 3-1) normal input mode (s0 command: 16 times) it commands the pwm data input only. the pwm data for 0 out to 15 out are transferred to the pwm data resister by repeating the pwm data input to the 16-bit shift regi ster and s0 command input 16 times. unless s1 command is input, the pwm data for 0 out to 15 out is not reflected on output. normal input mode) s0 command 16 times 3-2) speed input mode (s0 command 15 times + s1 command once) it commands pwm data input and reflecting t he pwm data on output at the same time. the pwm data for 0out to 15out are reflected in the output by inputting s1 command after repeating the pwm data input to the 16-bit shift register and s0 command input 15 times. normal input mode should be us ed to input pwm data only. speed input mode) s0 command 15 times + s1 command once
TC62D722CFG/cfng 2011-09-24 20 4. about operation of a pwm output the pwm output is outputted once to one s1 command. when doing pwm output once again, it's necessary to input s1 command. when s1 command is inputted during a pwm output by pwm output asynchronous mode, the present pwm output is canceled and a pwm output is immediately started by new pwm data. when s1 command is inputted during a pwm output by pwm output synchronous mode, after the present pwm output has ended, a pwm out put is started by new pwm data. if s1 command is inputted two or more times duri ng a pwm output by pwm out put synchronous mode, after the present pwm out put has ended, a pwm output will be start ed by the pwm data inputted at the end.
TC62D722CFG/cfng 2011-09-24 21 5. pwm output 5-1) normal pwm output mode. output waveform of 16-bit pwm. 123 511 512 513 514 16,382 16,383 16,384 16,385 16,386 16,387 32,766 32,767 32,768 32,769 32,770 32,771 49,150 49,151 49,152 49,153 49,154 49,155 65,023 65,024 65,025 65,026 65,534 65,535 65,536 trans (s1command) pwmclk outn pwmdata=0000h off on off on outn pwmdata=0001h off on outn pwmdata=0002h off on outn pwmdata=0003h off on outn pwmdata=0201h off on outn pwmdata=4001h off on outn pwmdata=8001h off on outn pwmdata=c001h off on outn pwmdata=fe01h off on outn pwmdata=ffffh 0
TC62D722CFG/cfng 2011-09-24 22 5-2) division pwm output mode. pwm output period is divided into 128 pieces. because turn on time of output is not biased, it is effective in t he flicker prevention on the display. output waveform of 16-bit pwm. 123 511 512 513 514 16,382 16,383 16,384 16,385 16,386 16,387 32,766 32,767 32,768 32,769 32,770 32,771 49,150 49,151 49,152 49,153 49,154 49,155 65,023 65,024 65,025 65,026 65,534 65,535 65,536 trans (s1command) pwmclk outn pwmdata=0000h off on off on period1 period2~period32 period33~period64 period65~period96 period97~period127 period128 outn pwmdata=0001h off on outn pwmdata=0002h off on outn pwmdata=0003h off on outn pwmdata=0004h off on outn pwmdata=0080h off on outn pwmdata=0081h outn pwmdata=0081h off on off on outn pwmdata=ffc0h off on outn pwmdata=ffc1h off on outn pwmdata=ffc2h off on outn pwmdata=fffdh off on outn pwmdata=fffeh off on outn pwmdata=ffffh 0
TC62D722CFG/cfng 2011-09-24 23 6. thermal shutdown circuit (tsd) when the temperature of internal ic exceeds 150 ? c, all constant current outputs are turned off by this function. the constant current is outputted again when the temperat ure decreases to the rating. the thermal shutdown function of this ic aims at stopping the influence (emitti ng smoke, ignition) on the circumference (led and substrate) to the minimum, when it is used on the conditions beyond not a function but the maximum rating for preventing des truction of ic and ic results in destruction. calculation of heat take care not to let the temperat ure of the internal ic exceed 150 by referring to the formula below. consumption power (ic output) ? w ? = (led supply voltage ? v? - minimum of v f of led ? v? ) output current ? a? number of output (on duty ? % ? / 100 ) consumption power (ic supply) ? w ? = ic supply voltage ? v? ic supply current ? a? total of consumption power ? w ? = consumption power (ic output) ? w ? + consumption power (ic supply) ? w ? heat value of internal ic ?? c ? = thermal resistance ?? c / w ? total of power consumption ? w ? temperature of internal ic ?? c ? = heat value of internal ic ?? c ? + ambient temperature ?? c ? in case used led supply voltage is high, and heat value of internal ic is large. heat value of internal ic can be reduced by decreasing the voltage with the external resistance shown below. setting method of resistance for heat protection voltage that should decrease by external resistance ? v? = led supply voltage ? v? - maximum of v f of led ? v? - output voltage ? v? resistance for heat protection ??? = voltage that should decrease by external resistance ? v? / output current ? a? 7. output delay function this function is intended to have the effect of reducing switching noise by reducing the di/dt when all outputs are on or off at the same time.t here is a switching ti melag between outputs. a switching timelag between outputs is put in order of the following. 0out 15out 7out 8out 1out 14out 6out 9out 2out 13out 5out 10out 3out 12out 4out 11out v dd v led controller sck sin vdd out0 out7 out15 sout gnd rext trans pwmclk resistance for heat protection >
TC62D722CFG/cfng 2011-09-24 24 8. power on reset (por) it avoids the malfunction by resetting all internal data of ic and setting default in startup. por circuit operates only when v dd rises from 0 v. to restart por, v dd should be 0.1 v or less. as for the voltage of storing the inte rnal data, it is guaranteed after v dd reaches 3.0 v or more once. v dd waveform por workin g ran g e beyond por working range por working range v dd =2.8 v v dd =0.1 v v dd =0 v end of por v dd voltage for end of reset v dd =3.0v v dd voltage for guaranteed data
TC62D722CFG/cfng 2011-09-24 25 application circuit (dynamic lighting) sck sin vdd out0 out7 out15 sout gnd rext trans pwmclk sck sin vdd out0 out7 out15 sout gnd rext trans pwmclk sck sin vdd out0 out7 out15 sout gnd rext v dd v led trans pwmclk controller
TC62D722CFG/cfng 2011-09-24 26 absolute maximum ratings (t a = 25c) characteristics symbol rating note1 unit supply voltage v dd ? 0.3 to 6.0 v output current i out 95 ma logic input voltage v in ? 0.3 to v dd ? 0.3 note2 v output voltage v out ? 0.3 to 17 v operating temperature t opr ? 40 to 85 c storage temperature t stg ? 55 to 150 c cfg 94 note3 thermal resistance r th(j-a) cfng 45.47 note4 c/w cfg 1.32 note5 power dissipation p d cfng 2.74 note5 w note1: voltage is ground referenced. note2: 6v must not be exceeded. note3: pcb condition is 76.2 mm114.3 mm1.6 mm cu=30% (semi conforming) note4: pcb condition is jedec 2s2p note5: when ambient temperature is 25c or more. every time ambient temperature exceeded 1c, please decrease 1/r th(j-a) . operating condition dc characteristics (unless otherwise noted, v dd = 3.0 v to 5.5 v, t a = -40 to 85 c) characteristics symbol test conditions min typ. max unit supply voltage v dd ? 3.0 ? 5.5 v high level logic input voltage v ih test terminal is sin, sck, trans, pwmclk 0.7 ? v dd ? v dd v low level logic input voltage v il test terminal is sin, sck, trans, pwmclk gnd ? 0.3 ? v dd v high level sout output current i oh ? ? ? ? 1 ma low level sout output current i ol ? ? ? 1 ma constant current output i out test terminal is outn 1.5 ? 90 ma
TC62D722CFG/cfng 2011-09-24 27 ac characteristics 1 (unl ess otherwise noted, v dd = 5.0 v, t a = 25 c) characteristics symbol test conditions min typ. max unit up edge trigger mode ? ? 30 serial data transfer frequency f sck down edge trigger mode cascade connect ? ? 25 mhz sck pulse width t wsck sck=?h? or ?l? 15 20 ? ns pwmclk pulse width t wpwm pwm=?h? or ?l? , r ext =200 ? to 12 k ? 15 20 ? ns trans pulse width t wtrans trans=?h? 20 ? ? ns t setup1 sin-sck 1 ? ? t setup2 trans-sck 5 ? ? t setup3 trans-sck 5 ? ? t setup4 trans-sck 2 ? ? serial data setup time t setup5 rans-pwmclk 5 ? ? ns t hold1 sin-sck 3 ? ? t hold2 trans-sck 7 ? ? t hold3 trans-sck 7 ? ? t hold4 trans-sck 2 ? ? serial data hold time t hold5 trans-pwmclk 5 ? ? ns ac characteristics 2 (unl ess otherwise noted, v dd = 3.3 v, t a = 25 c) characteristics symbol test conditions min typ. max unit up edge trigger mode ? ? 30 serial data transfer frequency f sck down edge trigger mode cascade connect ? ? 25 mhz sck pulse width t wsck sck=?h? or ?l? 15 20 ? ns pwmclk pulse width t wpwm pwm=?h? or ?l? , r ext =200 ? to 12 k ? 15 20 ? ns trans pulse width t wtrans trans=?h? 20 ? ? ns t setup1 sin-sck 1 ? ? t setup2 trans-sck 5 ? ? t setup3 trans-sck 5 ? ? t setup4 trans-sck 2 ? ? serial data setup time t setup5 rans-pwmclk 5 ? ? ns t hold1 sin-sck 3 ? ? t hold2 trans-sck 7 ? ? t hold3 trans-sck 7 ? ? t hold4 trans-sck 2 ? ? serial data hold time t hold5 trans-pwmclk 5 ? ? ns
TC62D722CFG/cfng 2011-09-24 28 electrical characteristics electrical characteristics 1 (unless otherwise noted, v dd = 5.0 v, t a = 25 c) characteristics symbol te s t circuit test conditions min typ. max unit high level sout output voltage v oh 1 i oh = ? 1ma v dd ? 0.3 ? v dd v low level sout output voltage v ol 1 t a =-40 to +85 ?c i ol = ? 1ma gnd ? 0.3 v high level logic input current i ih 2 v in = v dd test terminal is sin, sck ? ? 1 ? a low level logic input current i il 3 v in = gnd test terminal is pwmclk, sin, sck, trans ? ? -1 ? a i dd1 4 stand-by mode (1) or (2) v out =17v, sck=?l? ? ? 1.0 a power supply current i dd2 4 v out =1.0v, r ext =1.2k ? all output off ? ? 7.0 ma constant current error(ic to ic) s rank ? i out(ic) 5 v out =1.0v, r ext =1.2k ? 0 out to 15 out , 1ch output on ? ? 1.0 ? 1.5 % constant current error(ch to ch) s rank ? i out(ch) 5 v out =1.0v, r ext =1.2k ? 0 out to 15 out , 1ch output on ? ? 1.0 ? 1.5 % constant current error(ic to ic) n rank ? i out(ic) 5 v out =1.0v, r ext =1.2k ? 0 out to 15 out , 1ch output on ? ? 1.0 ? 2.5 % constant current error(ch to ch) n rank ? i out(ch) 5 v out =1.0v, r ext =1.2k ? 0 out to 15 out , 1ch output on ? ? 1.0 ? 2.5 % output off leak current i ok 5 v out =17v, r ext =1.2k ? , outn off ? ? 0.5 ? a constant current output power supply voltage regulation %v dd 5 v dd =4.5 to 5.5v, v out =1.0v r ext =1.2k ? 0 out to 15 out , 1ch output on ? ? 1 ? 5 %/v constant current output output voltage regulation %v out 5 v out =1.0 to 3.0v, r ext =1.2k ? 0 out to 15 out , 1ch output on ? ? 0.1 ? 0.5 %/v pull-down resistor r down 2 test terminal is trans, pwmclk 250 500 750 k ? ood voltage v ood 6 r ext =200 ? to 12k ? 0.2 0.3 0.4 v v osd1 6 r ext =200 ? to 12k ? v dd ? 1.3 v dd ? 1.4 v dd ? 1.5 osd voltage v osd2 6 r ext =200 ? to 12k ? 0.5 ? v dd 0.525 ? v dd 0.55 ? v dd v tsd start temperature t tds(on) ? junction temperature 150 ? ? ?c tsd release temperature t tsd(off) ? junction temperature 100 ? ? ?c
TC62D722CFG/cfng 2011-09-24 29 electrical characteristics 2 (unless otherwise noted, v dd = 3.3 v, t a = 25 c) characteristics symbol te s t circuit test conditions min typ. max unit high level sout output voltage v oh 1 i oh = ? 1ma v dd ? 0.3 ? v dd v low level sout output voltage v ol 1 t a =-40 to +85 ?c i ol = ? 1ma gnd ? 0.3 v high level logic input current i ih 2 v in = v dd test terminal is sin, sck ? ? 1 ? a low level logic input current i il 3 v in = gnd test terminal is pwmclk, sin, sck, trans ? ? -1 ? a i dd1 4 stand-by mode (1) or (2) v out =17v, sck=?l?? ? ? 1.0 a power supply current i dd2 4 v out =1.0v, r ext =1.2k ? all output off ? ? 7.0 ma constant current error(ic to ic) s rank ? i out(ic) 5 v out =1.0v, r ext =1.2k ? 0 out to 15 out , 1ch output on ? ? 1.0 ? 1.5 % constant current error(ch to ch) s rank ? i out(ch) 5 v out =1.0v, r ext =1.2k ? 0 out to 15 out , 1ch output on ? ? 1.0 ? 1.5 % constant current error(ic to ic) n rank ? i out(ic) 5 v out =1.0v, r ext =1.2k ? 0 out to 15 out , 1ch output on ? ? 1.0 ? 2.5 % constant current error(ch to ch) n rank ? i out(ch) 5 v out =1.0v, r ext =1.2k ? 0 out to 15 out , 1ch output on ? ? 1.0 ? 2.5 % output off leak current i ok 5 v out =17v, r ext =1.2k ? , outn off ? ? 0.5 ? a constant current output power supply voltage regulation %v dd 5 v dd =3.0 to 3.6v, v out =1.0v r ext =1.2k ? 0 out to 15 out , 1ch output on ? ? 1 ? 5 %/v constant current output output voltage regulation %v out 5 v out =1.0 to 3.0v, r ext =1.2k ? 0 out to 15 out , 1ch output on ? ? 0.1 ? 0.5 %/v pull-down resistor r down 2 test terminal is trans, pwmclk 250 500 750 k ? ood voltage v ood 6 r ext =200 ? to 12k ? 0.2 0.3 0.4 v v osd1 6 r ext =200 ? to 12k ? v dd ? 1.3 v dd ? 1.4 v dd ? 1.5 osd voltage v osd2 6 r ext =200 ? to 12k ? 0.5 ? v dd 0.525 ? v dd 0.55 ? v dd v tsd start temperature t tds(on) ? junction temperature 150 ? ? ?c tsd release temperature t tsd(off) ? junction temperature 100 ? ? ?c
TC62D722CFG/cfng 2011-09-24 30 switching characteristics switching characteristics 1 (u nless otherwise specified, v dd = 5.0 v, t a = 25 c) characteristics symbol te s t circuit test conditions min typ. max unit sck -sout t pd1u 7 up edge trigger mode 6 16 30 sck -sout t pd1d 7 down edge trigger mode 2 10 14 propagation delay pwmclk- 0out t pd2 7 r ext =1.2k ? ? 30 40 ns constant current output rise time t or 7 10 ? 90% at voltage waveform of outn r ext =1.2k ? ? 10 20 ns constant current output fall time t of 7 90 ? 10% at voltage waveform of outn r ext =1.2k ? ? 10 20 ns t dly(on) 7 r ext =1.2k ? 1 4 9 ns constant current output delay time t dly(off) 7 r ext =1.2k ? 1 4 9 ns switching characteristics 2 (u nless otherwise specified, v dd = 3.3 v, t a = 25 c) characteristics symbol te s t circuit test conditions min typ. max unit sck -sout t pd1u 7 up edge trigger mode 6 16 30 sck -sout t pd1d 7 down edge trigger mode 2 13 18 propagation delay pwmclk- 0out t pd2 7 r ext =1.2k ? ? 30 40 ns constant current output rise time t or 7 10 to 90% at voltage waveform of outn r ext =1.2k ? ? 10 20 ns constant current output fall time t of 7 90 to 10% at voltage waveform of outn r ext =1.2k ? ? 10 20 ns t dly(on) 7 r ext =1.2k ? 2 6 12 ns constant current output delay time t dly(off) 7 r ext =1.2k ? 2 6 12 ns
TC62D722CFG/cfng 2011-09-24 31 test circuit test circuit 1 : high level sout output voltage / low level sout output voltage test circuit 2 : high level logic input current / pull-down resistance test circuit 3 : low level logic input current i o = -1ma to 1ma c l ? 10.5 pf v dd ? 3.3 v, 5.0 v v sck sin vdd out0 out7 out15 sout gnd rext trans pwmclk v dd ? 3.3 v, 5.0 v v ih = v dd a a a a sck sin vdd out0 out7 out15 sout gnd rext trans pwmclk v dd ? 3.3 v, 5.0 v a a a a sck sin vdd out0 out7 out15 sout gnd rext trans pwmclk v il = gnd controller
TC62D722CFG/cfng 2011-09-24 32 r ext ? 1.2k ? test circuit 4 : power supply current v dd ? 3.3 v, 5.0 v a sck sin vdd out0 out7 out15 sout gnd rext trans pwmclk v out ? 1 v, 17 v test circuit 5 : constant current error / output off leak current constant current output po wer supply voltage regulation constant current output ou tput voltage regulation v out ? 1 to 3 v, 17 v v dd ? 3.0 to 3.3 v, 4.5 to 5.5 v a a r ext ? 1.2k ?? a sck sin vdd out0 out7 out15 sout gnd rext trans pwmclk controller controller
TC62D722CFG/cfng 2011-09-24 33 test circuit 6 : ood voltage / osd voltage all output is set to turning on. only one output is connected with the v out2 power supply, and other outputs are connected with the v out1 power supply. v out2 is changed and ood voltage / osd voltage is checked in the error detection result from each output terminal voltage and sout. v dd ? 3.3 v, 5.0 v r ext ? 200?? , 12k ? v out1 ? 1.0 v v v v v out2 sck sin vdd out0 out7 out15 sout gnd rext trans pwmclk sck sin vdd out0 r l c l out7 c l r l out15 c l r l sout gnd rext c l ? 10.5 pf v dd ? 3.3 v, 5.0 v test circuit 7 : switching characteristics v ih ? v dd v il ? gnd t r ? t f ? 10 ns (10 to 90%) v led ? 5.0v r ext ? 1.2k ??? trans pwmclk r l ? 200 ? c l ? 10.5 pf controller controller
TC62D722CFG/cfng 2011-09-24 34 timing waveform 1. sck, trans, sin, sout, pwmclk if sck is "l" when changing trans into "h", pl ease make scl "l" when changing trans into "l" if sck is "h" when changing trans into "h", please make scl "h" when changing trans into "l" 2. outn
TC62D722CFG/cfng 2011-09-24 35 3.pwmclk, 0 out to 15out t pd2 t wpwm t dly(on) t dly(on) t dly(on) t dly(on) t dly(on) t dly(on) t dly(on) t dly(on) t dly(on) t dly(on) t dly(on) t dly(on) t dly(on) t dly(on) t dly(on) t pd2 t dly(off) t dly(off) t dly(off) t dly(off) t dly(off) t dly(off) t dly(off) t dly(off) t dly(off) t dly(off) t dly(off) t dly(off) t dly(off) t dly(off) t dly(off) pwmclk out0 out15 out7 out8 out1 out14 out6 out9 out2 out13 out5 out10 out3 out12 out4 out11 on off on off on off on off on off on off on off on off on off on off on off on off on off on off on off on off t wpwm outn is a voltage waveform.
TC62D722CFG/cfng 2011-09-24 36 reference data this data is provided for reference only. so, in designing for mass production, take enough care in evaluating ic operation. output current (i out ) ? constant current output setting resistance (r ext ) the output gain control data is default. i out - r ext 0 10 20 30 40 50 60 70 80 90 0 1000 2000 3000 4000 5000 r ext ( ? ) i out (ma) theoretical formula i out (a) = (1.03(v) ? r ext (? )) ? 16.5 v dd =3.0v to 5.5v v out =1.0v t a =25c
TC62D722CFG/cfng 2011-09-24 37 reference data this data is provided for reference only. so, in designing for mass production, take enough care in evaluating ic operation. output current (i out ) ? output voltage (v out ) i out - v out v dd =3.3v,ta=25 ,1chon 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 v out (v) i out (ma) i out - v out v dd =5.0v,ta=25 ,1chon 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 v out (v) i out (ma)
TC62D722CFG/cfng 2011-09-24 38 notes on design of ics 1. regarding decoupling capacitor between power supply and gnd it is recommended that decoupling capacitor between power supply and gnd should place as near ic as possible. 2. regarding resistors for setting of output current when resistors for setting of output current (r ext ) are used commonly by many ics, in designing for mass pr oduction, ta ke enough care in evaluating ic operation. 3. regarding pcb layout there is only one gnd terminal on this device when the inductance in the gnd line and the resistor are large, the device may malfunction due to the gnd noise when output swit ching by the circuit board pattern and wiring. therefore, take care when designi ng the circuit board pattern layout and the wiring from the controller. 4. please check the latest technical mate rial at the time of mass production.
TC62D722CFG/cfng 2011-09-24 39 package dimension tc62d722fg: ssop24-p-300-1.00b weight : 0.32 g (typ.) unit : mm
TC62D722CFG/cfng 2011-09-24 40 tc62d722fng: htsso p24-p-300-0.65 weight : 0.10 g (typ.) unit : mm
TC62D722CFG/cfng 2011-09-24 41 notes on contents 1. block diagrams some of the functional blocks, circuits, or constant s in the block diagram may be omitted or simplified for explanatory purposes. 2. equivalent circuits the equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 3. timing charts timing charts may be simplified for explanatory purposes. 4. application circuits the application circuits shown in this document are provided for reference purposes only. thorough evaluation is required, especially at the mass production design stage. toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. 5. test circuits components in the test circuits are used only to obta in and confirm the device characteristics. these components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
TC62D722CFG/cfng 2011-09-24 42 ic usage considerations notes on handling of ics [1] the absolute maximum ratings of a semiconductor devic e are a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings. exceeding the rating(s) may cause the device breakdown, damage or det erioration, and may result injury by explosion or combustion. [2] use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current and/or ic failure. the ic will fully br eak down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the brea kdown can lead smoke or ignition. to minimize the effects of the flow of a la rge current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. [3] if your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfuncti on or breakdown caused by the curr ent resulting from the inrush current at power on or the negative current resulting from the back electromotive force at power off. ic breakdown may cause injury, smoke or ignition. use a stable power supply with ics with built-in protec tion functions. if the power supply is unstable, the protection function may not operate, causing ic breakdown. ic breakdown may cause injury, smoke or ignition. [4] do not insert devices in the wrong orientation or incorrectly. make sure that the positive and negative termi nals of power supplies are connected properly. otherwise, the current or power consumption may ex ceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. in addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time. [5] carefully select external components (suc h as inputs and negative feedback capacitors) and load components (such as speakers), for example, power amp and regulator. if there is a large amount of leakage current such as input or negative feedback condenser, the ic output dc voltage will increase. if this output voltage is conn ected to a speaker with low input withstand voltage, overcurrent or ic failure can cause smoke or ignition. (the over current can cause smoke or ignition from the ic itself.) in particular, please pay attenti on when using a bridge tied load (btl) connection type ic that inputs output dc voltage to a speaker directly. points to remember on handling of ics (1) heat radiation design in using an ic with large current flow such as power amp, regulator or driver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (t j ) at any time and condition. these ics generate heat even during norm al use. an inadequate ic heat radiation design can lead to decrease in ic life, deterioration of ic char acteristics or ic breakdown. in addition, please design the device taking into considerate the effect of ic heat radiation with peripheral components. (2) back-emf when a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor?s power supply due to the effect of back-emf. if the current sink capability of the power supply is small, the device?s motor power supply and outpu t pins might be exposed to conditions beyond maximum ratings. to avoid this problem, take the effect of back-emf into consideration in system design. (3) thermal shutdown circuit thermal shutdown circuits do not necessarily protect ic s under all circumstances. if the thermal shutdown circuits operate against the over temperature, clear the heat generation status immediately. depending on the method of use and usage conditions , such as exceeding absolute maximum ratings can cause the thermal shutdown circuit to not oper ate properly or ic breakdown before operation.
TC62D722CFG/cfng 2011-09-24 43 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collectively ?toshiba?), reserve the right to make changes to the in formation in this document, and related hardware, software a nd systems (collectively ?product?) without notice. ? this document and any information herein may not be reproduc ed without prior written permission from toshiba. even with toshiba?s written permission, reproduc tion is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product?s quality a nd reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for prov iding adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid sit uations in which a malfunction or failure of product could cause loss of human life, b odily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own app lications, customers must also refer to and comply with (a) the latest versions of all relevant toshiba information, including without limitation, this document, the specificati ons, the data sheets and application notes for product and the precautions and conditions set forth in the ?toshiba semiconductor reliability handbook? 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